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GATE-BASED · RESEARCH

Topological Quantum Computers

Topological quantum computing aims to encode qubits in non-local degrees of freedom of exotic quasiparticles called non-Abelian anyons (specifically Majorana fermions). Because the quantum information is stored non-locally, local noise sources cannot easily corrupt it — making topological qubits intrinsically more robust than physical qubits in other architectures. Microsoft has pursued this approach for over a decade. As of 2025, they reported early experimental signatures of Majorana-based qubits in their Majorana 1 chip, but a working topological quantum computer remains in the research phase.

GATE SPEED

Gate speeds not yet characterized at scale

CONNECTIVITY

Architecture-dependent…

ENVIRONMENT

~100 millikelvin — dilution refrigerator required

t=0t=Tσ₁σ₂γ₁γ₂γ₃γ₄exchangeexchangeNON-ABELIAN ANYON BRAIDING — TOPOLOGICAL GATE

How Topological Qubits Work

Topological quantum computing is a fundamentally different approach to qubit protection. Instead of encoding quantum information in the physical state of a single particle (a transmon, an ion, an atom) and carefully isolating it from noise, topological qubits encode information non-locally in collective properties of a many-body quantum system. The information is stored in the global topology of the quantum state rather than in any local degree of freedom — making it inherently resistant to local disturbances.

The primary candidate for topological qubits is Majorana zero modes (MZMs). These are exotic quasiparticle excitations that appear at the ends of certain one-dimensional topological superconductors — specifically, semiconductor nanowires (InAs or InSb) with strong spin-orbit coupling, placed in proximity to a conventional superconductor (Al) and subjected to a magnetic field. When the parameters (field strength, chemical potential, superconducting gap) are tuned correctly, two Majorana modes appear localized at the two ends of the wire. Quantum information is encoded in the combined fermion parity of the two ends — a fundamentally non-local quantity.

Quantum gates are implemented by "braiding" Majorana modes — physically exchanging the positions of two Majorana quasiparticles. In two-dimensional systems, unlike ordinary fermions or bosons, exchanging two non-Abelian anyons (the class to which MZMs belong) does not simply return the state to itself; it applies a unitary transformation to the degenerate ground state. This unitary depends only on the topology of the braid (which Majorana went around which other), not on the exact path or timing — giving topological protection against errors. In practice, Majorana modes must be moved using electrostatic gates on the nanowire.

Physical Implementation

Qubit Medium

Majorana zero modes at the ends of InAs or InSb semiconductor nanowires proximitized to Al superconducting shells; qubit encoded in fermion parity of a pair of MZMs

Control Mechanism

Electrostatic gate voltages to tune chemical potential and control MZM positions; magnetic fields to drive topological phase transition; braiding via T-junction or 2D topological networks

Operating Environment

~50–100 millikelvin in dilution refrigerator; applied magnetic field (0.1–1 T); UHV sample preparation; extreme parameter tuning sensitivity

Readout Mechanism

Interferometric readout via Josephson junction or quantum dot charge sensing of the MZM parity; conductance spectroscopy for verification; non-demolition parity readout demonstrated in research settings

Connectivity and Gate Operations

Connectivity

Not yet demonstrated at scale. Theoretical proposals involve 2D networks of topological nanowires connected at T-junctions, allowing Majorana modes to be braided through the network. The connectivity structure would be determined by the device geometry and the gate-controlled movement of MZMs. The key challenge is engineering reliable T-junction devices where MZMs can be controllably exchanged.

Native Gate Set

Topologically protected: Clifford gates via Majorana braiding (Hadamard, CNOT, phase gate). Universal quantum computation requires a non-Clifford gate (e.g., T gate) which is not topologically protected and requires magic state distillation — a significant resource overhead. This is a fundamental limitation of Majorana-based topological computing with current proposals.

Gate Speed

Gate speeds not yet characterized at scale; braiding operations are theoretically slow

BRAIDING NETWORK

Potential Advantages

  • ✓Theoretically intrinsic fault tolerance from non-local qubit encoding — local noise sources cannot flip the qubit
  • ✓If realized, topological qubits may require 10–100× fewer physical qubits per logical qubit than surface-code-corrected transmon qubits
  • ✓Braiding gates are topologically protected — their fidelity is determined by the topological gap, not by gate timing precision
  • ✓Long coherence times expected once MZMs are reliably created and the topological gap is sufficiently large
  • ✓Could dramatically reduce the hardware overhead for fault-tolerant quantum computing if engineering challenges are solved

Limitations & Challenges

  • —Majorana zero modes have proven extremely difficult to reliably create, distinguish from trivial near-zero modes, and control
  • —No gate-based topological quantum computer has been demonstrated; the field is in an experimental physics research phase
  • —Microsoft's 2018 paper claiming Majorana signatures was retracted in 2021 due to data presentation issues — illustrating how difficult reliable verification is
  • —The topological gap (the energy protecting the qubit) must be large enough that thermal fluctuations cannot excite quasiparticles; achieving this at practical temperatures remains challenging
  • —Universal quantum computation requires magic state distillation for T gates — a costly classical-overhead step not removed by topological protection
  • —Timeline to a working topological quantum computer is the least certain of all commercial architectures

Scaling Considerations

Microsoft's Majorana 1 chip (announced 2025) represents the current state of the art: a chip integrating multiple topological qubit devices on a single package, with reported signatures of Majorana-based qubit operation. Microsoft's vision is that topological qubits will require far fewer physical-to-logical qubit overhead than conventional error correction, enabling compact fault-tolerant computers. The critical near-term milestones are: (1) reliably demonstrating a stable, protected topological qubit with measured coherence times, (2) demonstrating a two-qubit gate via braiding, and (3) reaching fidelity thresholds. Given the current research state, a working topological quantum computer delivering practical advantage is likely more than a decade away.

Coherence: Topological qubits are theoretically immune to local perturbations due to non-local encoding of quantum information. This intrinsic error protection is the primary motivation; experimental coherence times not yet published.

Available QPUs

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No QPUs from this architecture are currently listed.

Leading Companies

Microsoft Azure Quantum

Workload Suitability

Full guide →
Cryptanalysis & Post-Quantum CryptographyExperimental

Shor's algorithm can factor large integers and solve discrete logarithms exponen…

WELL SUITED FOR

  • ›Ultimately the same workloads as other gate-based quantum computers — but with potentially far lower qubit overhead for fault tolerance
  • ›Research problems requiring fault-tolerant circuits that are currently too resource-intensive on non-topological architectures

LESS SUITED FOR

  • —Any near-term workload (topological QC is not commercially available)
  • —NISQ-era variational algorithms (topological approach is inherently fault-tolerant, not noise-tolerant-by-design)
  • —Continuous optimization requiring fast iteration cycles

Frequently Asked Questions

What is a Majorana zero mode?›

A Majorana zero mode is a quasiparticle excitation in a condensed matter system that is its own antiparticle. In a topological superconductor, pairs of MZMs appear at zero energy at the boundaries of the system. Unlike ordinary electrons (which are Fermi particles with definite number), MZMs are superpositions — encoding quantum information in their non-local collective state. The "zero mode" refers to the zero energy gap to create the excitation (within the degenerate ground state subspace).

Why was Microsoft's 2018 Majorana paper retracted?›

A 2018 Nature paper from Microsoft/TU Delft claimed to observe signatures consistent with a topological phase transition and Majorana modes in an InSb nanowire. A subsequent reanalysis in 2020–2021 found that the paper had not included all measured data and the selected data did not provide strong evidence for Majorana modes. The paper was retracted in 2021. This illustrates the challenge of distinguishing true topological Majorana signatures from trivial near-zero-energy states in semiconductor devices.

What is the topological protection and why does it help with errors?›

In a topological superconductor, the qubit's information is encoded in the shared parity state of two MZMs that are spatially separated. To corrupt this information, an error would need to simultaneously affect both ends of the wire — spanning the entire system. Local noise, which affects only individual atoms or small regions, cannot flip the qubit. This is analogous to how a knot in a string cannot be removed by local deformations — it requires a global operation.

What is Majorana 1 and what did Microsoft demonstrate?›

Microsoft's Majorana 1 (announced February 2025) is a chip that integrates eight topological qubits in a device using the topoconductor platform — InAs-Al heterostructures engineered to host Majorana modes. Microsoft claimed to have demonstrated a new phase of matter (the topological phase) and qubit readout with low error rates. Independent verification of these claims is ongoing in the research community.

When might topological quantum computers be practical?›

The most optimistic credible timelines suggest a first demonstration of a protected logical qubit via topological means by the late 2020s, and a small-scale practical topological processor by the 2030s. Given the experimental challenges encountered so far, significant uncertainty remains. Most quantum computing experts regard topological QC as the highest-risk but highest-reward long-term approach.

Key References